Field Effect Transistors (FETs) have found a wide application in the electronics industry. Some specific processing applications include switching, amplification, filtering, and other tasks. Metal Oxide Field Effect Transistors (MOSFETs) are one of the more common type of FET devices now used. They find significant use, for example, in digital processing applications. A MOSFET structure typically includes a metal or polysilicon gate contact energized to create an electric field within a semiconductor channel, which allows current to conduct between source and drain regions.
Designers, following Moore's law, continue in their attempts to shrink the size of transistors. As transistors become smaller and smaller, gate dielectric layers have also become thinner and thinner. The continued decrease in the thickness of gate dielectric layers is leading to technical problems. Leakage through a silicon dioxide dielectric layer of a gate increases exponentially as its thickness decreases. Gate dimensions that are proposed for the future will require dielectric layers that are so thin they may stray from purely “on” and “off” states. Instead, leakage may lead to a low power, or “leaky”, off state. This challenge must be addressed for the success of future transistor generations.
One alternative that is being proposed is to use high k materials in place of silicon dioxide as the gate dielectric layer. High k refers to a high dielectric constant, a measure of how much charge a material can hold. Differing materials possess differing abilities to hold charge. High k materials include compounds of oxygen such as hafnium dioxide (HfO2), zirconium dioxide (ZrO2), and titanium dioxide (TiO2), and possess a dielectric constant above 3.9, the value of silicon dioxide.
The dielectric constant also affects transistor performance. As k value increases, the transistor capacitance also increases. This increased capacitance allows the transistor to switch properly between the “on” and “off” states. Further, the higher k values correspond to a high quality switching such that there is very little current leakage in the “off” state and high current flow during the “on” state. Additionally, high k materials in the dielectric stack can lead to improved charge mobility in the final transistor. The good charge mobility that is characteristic of high k materials can improve the performance, reliability, and lifespan of the transistor. Thus high k materials hold significant promise as a potential material to be used in dielectric stacks.
However, the electronic industry has predominantly used silicon dioxide as a material for the dielectric layer for the last several decades. Experimental use of high k materials for the dielectric layer is now revealing other manufacturing and processing challenges that were not apparent when thicker silicon dioxide layers were employed. It is desired to overcome these technical challenges in order to further develop applications of high k materials. One particular problem that is manifested when high k materials are used in the dielectric layer is poor dielectric performance due to the formation of oxides at the surface of the silicon layer.
Many of the materials being proposed for use in the high k dielectric layer are compounds that include oxygen. Further the deposition of these materials on a silicon substrate may include processing steps that include an oxidizing step. Chemical Vapor Deposition (CVD) or sputtering of one element followed by the oxidation of the material is one exemplary kind of process for forming a high k dielectric layer. Oxygen, whether as an ambient gas that is present in the deposition process or supplied in the oxide compound itself, is thus present in close proximity to the silicon substrate. The result of this kind of manufacturing is that an interfacial layer, a layer between the silicon substrate and the high k dielectric layer, is appearing. The interfacial layer includes oxide materials such as silicon dioxide that result from oxygen reactions with the silicon of the substrate. And these oxide materials hurt the performance otherwise to be achieved with high k dielectric materials.
A thin silicon dioxide layer is in effect a low k interfacial layer. This kind of low k interfacial layer acts electronically like a capacitor in series with the high k dielectric layer. The effect of the silicon dioxide interfacial layer is to decrease the overall capacitance of the gate dielectric stack, thus defeating the advantage of using high k materials. Additionally, the interfacial layer leads to mobility degradation in the channel region (just below the gate dielectric layer), and thus degrades the performance of the device it is associated with.
Accordingly, it is desirable to identify new materials and methods of applying these materials in high k dielectric layers. The desired process and materials should reduce or eliminate the interfacial oxide layer effect noted in previous use with high k materials in gate dielectric layers. In addition, it is desirable to develop these materials and methods so that they are suitable for use with current processing techniques used in FET fabrication. It is also desired to apply high k dielectric materials so as to improve charge mobility in the semiconductor and thus to improve the semiconductor's useful lifespan. The present invention addresses one or more of these needs. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description of the invention and the appended claims, taken in conjunction with the accompanying drawings and this background of the invention.